I am an experienced engineer specialized in FPGA-accelerated computing, with
hands-on expertise across a range of platforms, from SoCs to cloud
environments. My work focuses on developing secure applications, implementing
cryptographic algorithms in hardware, and leveraging trusted computing
solutions.
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Resume
Work Experience
Researcher @ COSIC - KU
Leuven
2017 - 2024
FPGA-Accelerated Homomorphic Computation in Cloud
- Explored design-space for massively parallel hardware computation
- Developed high-performance HW/SW interfaces for low-latency ciphertext transfers
Security Analysis of FPGA-Accelerated Computing
- Worked with CPU+FPGA codesign platforms: Intel Xeon+FPGA, Amazon EC2 F1, and Xilinx Zynq SoC/MPSoC
- Investigated hardware interconnects and kernel drivers for efficient HW/SW communication
- Evaluated FPGA access to CPU memory and cache performance
- Explored IP protection schemes for FPGA-accelerated cloud platforms
Security in Invasive Computing Systems: INVASIC
- Conducted mutual security evaluations of computational nodes
- Designed methods to establish trust relationships among nodes before computation distribution
Internship @ Intel Labs
2020
Security of Intel FPGAs
- Patent US11556677B2 - Scalable Runtime Validation for On-Device Design Rule Checks
- Enabled multi-tenant FPGA usage in mistrusting server-client setups
Embedded Systems Engineer @
Elmaksan
2014
Industrial System Designs
- Designed an Ethernet-based data logger to collect data from walk-through metal detectors
- Achieved 50% cost reduction by integrating DC motor driver and PLC communication into existing HMI interfaces
Education
PhD @ COSIC - KU Leuven
2017 - 2022
- PhD Thesis: FPGA Accelerators for Cryptography and Their Protection in the Cloud
- Finalist Prize Winner at ZPRIZE Competition
- Two-Time Finalist at AMD/Xilinx Open Hardware Competition
- Best Teaching Assistant Award by VTK Student Association
Master's @ ESAT - KU Leuven
2014 - 2016
- PhD Thesis: HW Acceleration of a Software-based VPN
- Achieved Best Masters' Thesis Award
Bachelor @ Middle East Technical
University
2008 - 2013
- Computer Architectures Track:
Logic Design, Computer Architectures and Organization, Data Structures, Operating Systems
- Achieved 3 high-honor and 1 honor degrees in late semesters.
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Publications
FPT: a Fixed-Point Accelerator for Torus Fully Homomorphic Encryption
2023
ACM CCS - ACM SIGSAC Conference on Computer and Communications Security
M. Van Beirendonck, J. D'Anvers, F. Turan, I. Verbauwhede
FPGA Accelerators for Cryptography and Their Protection in the Cloud
2022
PhD Thesis
F. Turan
Double Trouble: Combined Heterogeneous Attacks on Non-Inclusive Cache Hierarchies
2022
USENIX Security Symposium
A. Purnal, F. Turan, I. Verbauwhede
Prime+Scope: Overcoming the Observer Effect for High-Precision Cache Contention Attacks
2021
ACM CCS - ACM SIGSAC Conference on Computer and Communications Security
A. Purnal, F. Turan, I. Verbauwhede
Trust in FPGA Accelerated Cloud Computing
2020
ACM CSUR - ACM Transactions on Computing Surveys
F. Turan, I. Verbauwhede
Proxy Re-Encryption for Accelerator Confidentiality in FPGA-Accelerated Cloud
2020
Cryptology ePrint Archive
F. Turan, I. Verbauwhede
HEAWS: An Accelerator for Homomorphic Encryption on the Amazon AWS FPGA
2020
IEEE TC - IEEE Transactions on Computers
F. Turan, S. Sinha Roy, I. Verbauwhede
Compact Domain-Specific Co-processor for Accelerating Module Lattice-based Key Encapsulation
Mechanism
2020
DAC 2020 - Design Automation Conference
J. M. Bermudo Mera, F. Turan, A. Karmakar, S. Sinha Roy, I. Verbauwhede
FPGA-based High-Performance Parallel Architecture for Homomorphic Computing on Encrypted Data
2019
HPCA 2019 - 25th IEEE International Symposium on High-Performance Computer Architecture
S. Sinha Roy, F. Turan, F. Vercauteren, I. Verbauwhede, K. Järvinen
Propagating Trusted Execution through Mutual Attestation
2019
SysTEX 2019 - ACM Workshop on System Software for Trusted Execution
F. Turan, I. Verbauwhede
Compact and Flexible FPGA Implementation of Ed25519 and X25519
2019
ACM TECS - ACM Transactions on Embedded Computing Systems
F. Turan, I. Verbauwhede
Hardware Acceleration of a Software-Based VPN
2016
FPL 2016 - In 26th International Conference on Field Programmable Logic and Applications
F. Turan, R. De Clercq, P. Maene, O. Reparaz, and I. Verbauwhede
